Job Description

In an increasingly connected world, the pandemic has highlighted just how essential telecom networks are to keeping society running. The Network Infrastructure group is at the heart of a revolution to connectivity, pushing the boundaries to deliver more and faster network capacity to people worldwide through our ambition, innovation, and technical expertise.

Join Optical Networks division , where innovation meets scale in the AI-driven data center era. With the recent acquisition of Infinera, we’ve united two industry leaders to create an optical networking powerhouse—combining cutting-edge technology with proven leadership to redefine the future of connectivity.

Infinera is now part of the Nokia Corporation and its subsidiaries. When you apply, the information you share will be handled with care and used only for recruitment purposes within the group.

Qualifications

• Must be extremely familiar with essential CAD tools, such as Cadence Virtuoso, Spectre, Layout and Layout-XL, Mentor AFS and Calibre.
• Must have a proven track record of designing data-converters and taking them to production.
• Must have a good understanding of standard CMOS as well as high-voltage technologies (e.g., BCD) analog / mixed-signal design methodologies and circuit analysis.
• Must understand ESD protections.
• Good understanding of device physics and the impacts of layout effects.
• Able to perform behavioral modeling of blocks and circuits with Verilog-A or Verilog-AMS.
• Collaborative with other local or remote team members in a professional environment.
• Fluent in verbal and written communications.
• Capable of coaching and mentoring junior circuit designers and layout engineers.
• Independently resolves issues and design challenges.
• Self-motivated and detail-oriented.

Education and Experience Requirements

• Staff Design Engineer: M.S. in E.E. with 8+ years of experience, or Ph.D. in E.E. with 8+ years of experience.
• Principal Design Engineer: M.S. in E.E. with 12+ years of experience, or Ph.D. in E.E. with 12+ years of experience.

Responsibilities

• Design, implement, and simulate high-resolution data-converters, including DACs and ADCs.
• Design, implement, and simulate other low power, low noise analog circuits such as band-gap and reference circuits, opamps, and output buffers.
• Craft layout floor plans to optimize performance; supervise layout activities and provide guidelines to layout engineers; hands-on in drawing layout if necessary.
• Develop analog testing plans and collaborate with PE/TE teams to characterize product functionality and performance to ensure quality.
• Comply with team’s design methodologies and release flows.

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